Hi,
I want to make a software UART using MSP430fr2311 device. My code is able to transmit data from the msp430 device to pc. Can anyone help me for the receiver code? I am getting difficulties in that part.
#include <msp430fr2311.h> #define TXD BIT0 #define RXD BIT1 int transmit(unsigned char); unsigned char dtx, rtx,i=0; int main(void) { WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer __bis_SR_register(SCG0); // disable FLL CSCTL3 |= SELREF__REFOCLK; // Set REFO as FLL reference source CSCTL0 = 0; // clear DCO and MOD registers CSCTL1 &= ~(DCORSEL_7); // Clear DCO frequency select bits first CSCTL1 |= DCORSEL_3; // Set DCO = 8MHz CSCTL2 = FLLD_0 + 243; // DCODIV = 1 __delay_cycles(3); __bic_SR_register(SCG0); // enable FLL while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)); // Poll until FLL is locked CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK; // set default REFO(~32768Hz) as ACLK source, ACLK = 32768Hz // default DCODIV as MCLK and SMCLK source P1DIR |= BIT0 + BIT1; // Set P1.0 to output direction P1OUT |= BIT0 + BIT1; PM5CTL0 &= ~LOCKLPM5; // Disable the GPIO power-on default high-impedance mode // to activate previously configured port settings while(1) { transmit(0xAA); } } int transmit(unsigned char dtx) { static unsigned char temp_dt=0; P1OUT &= ~BIT0; //start bit __delay_cycles(800); temp_dt = 0; for(i = 0; i < 8; i++) { temp_dt = (dtx>>i & 0x01); if(temp_dt==1) P1OUT |= BIT0; //data bits else P1OUT &= ~BIT0; //data bits __delay_cycles(800); } P1OUT |= BIT0; __delay_cycles(1600); temp_dt = 0; }
#include <msp430fr2311.h> #define TXD BIT0 #define RXD BIT1 int transmit(unsigned char); unsigned char dtx, rtx,i=0; int main(void) { WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer __bis_SR_register(SCG0); // disable FLL CSCTL3 |= SELREF__REFOCLK; // Set REFO as FLL reference source CSCTL0 = 0; // clear DCO and MOD registers CSCTL1 &= ~(DCORSEL_7); // Clear DCO frequency select bits first CSCTL1 |= DCORSEL_3; // Set DCO = 8MHz CSCTL2 = FLLD_0 + 243; // DCODIV = 1 __delay_cycles(3); __bic_SR_register(SCG0); // enable FLL while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)); // Poll until FLL is locked CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK; // set default REFO(~32768Hz) as ACLK source, ACLK = 32768Hz // default DCODIV as MCLK and SMCLK source P1DIR |= BIT0 + BIT1; // Set P1.0 to output direction P1OUT |= BIT0 + BIT1; PM5CTL0 &= ~LOCKLPM5; // Disable the GPIO power-on default high-impedance mode // to activate previously configured port settings while(1) { transmit(0xAA); } } int transmit(unsigned char dtx) { static unsigned char temp_dt=0; P1OUT &= ~BIT0; //start bit __delay_cycles(800); temp_dt = 0; for(i = 0; i < 8; i++) { temp_dt = (dtx>>i & 0x01); if(temp_dt==1) P1OUT |= BIT0; //data bits else P1OUT &= ~BIT0; //data bits __delay_cycles(800); } P1OUT |= BIT0; __delay_cycles(1600); temp_dt = 0; }