MSP430 problem with reading from UART when NOT debugging through JTAG

I've got a program developed on the MSP430F5438 which I'm trying to run on a MSP430F5438A.

The problem I have is with communicating through the UARTs.

The MSP430 has a 32KHz crystal connected to XT1 and is configured to run at 8MHz(8,000,000Hz) 

My UARTs use ACLK (sourced from XT1) for 9600 and SMCLK for the higher baud rates.

When I debug my program using the JTAG everything work OK:

I can read and write using the UARTS at all baud rates.

But when I run the program WITHOUT the debugger

the UARTs can write, but can't read at baud rates higher than 9600 (at 9600 the UARTs work OK)

If I change the code to use SMCLK for 9600 baudrate I get the same problem, I can write but can't read from the UART..

The code I use for configuring the clock is:

SELECT_ACLK(SELREF__XT1CLK);
P7SEL |= (BIT0 | BIT1); // rt select XT1

SELECT_FLLREF(SELREF__XT1CLK);

uint16_t status;
do {
status = LFXT_Start_Timeout(XT1DRIVE_0, 50000);
} while (status == UCS_STATUS_ERROR);

Init_FLL_Settle(7995, 244); // ~ 244*32768 = 7995392

(functions are defined in HAL_UCS.h/HAL_UCS.c) 

The code I use for configuring the UART is :

UCA3CTL1 |= UCSWRST; // **Put state machine in reset**
UCA3IE &= ~(UCRXIE | UCTXIE); // Enable USCI_A0 RX interrupt

int result = 1;
int mask = 0;
switch (config & UART_BAUDRATE_MASK) {
case UART_9600:
UCA3CTL1 = UCSSEL_1 | UCSWRST; // CLK = ACLK
UCA3BR0 = 0x03; // 32kHz/9600=3.41 (see User's Guide)
UCA3BR1 = 0x00; //
UCA3MCTL = UCBRS_3 + UCBRF_0; // Modulation UCBRSx=3, UCBRFx=0
break;
case UART_115200:
UCA3CTL1 = UCSSEL_2 | UCSWRST; // CLK = SMCLK
UCA3BR0 = 69; // 8MHz/115200 (see User's Guide)
UCA3BR1 = 0; // 8MHz/115200
UCA3MCTL |= UCBRS_4 + UCBRF_0; // Modulation UCBRSx=4, UCBRFx=0
break;
default:
result = 0;
}
switch (config & UART_PARITY_MASK) {
case UART_PARITY_NONE:
// UCPEN=0,UCPAR=?
break;
case UART_PARITY_ODD:
mask |= UCPEN | UCPAR;
break;
case UART_PARITY_EVEN:
mask |= UCPEN; // UCPAR=0
break;
default:
result = 0;
}

switch (config & UART_STOP_MASK) {
case UART_STOP1:
// UCSPB=0
break;
case UART_STOP2:
mask |= UCSPB;
break;
default:
result = 0;
}
switch (config & UART_SIZE_MASK) {
case UART_8:
//UC7BIT=0
break;
case UART_7:
mask |= UC7BIT;
break;
default:
result = 0;
}

UCA3CTL0 &= ~(UCPEN | UCPAR | UC7BIT | UCSPB);
UCA3CTL0 |= mask;

UCA3IE |= UCRXIE;
return result;

Can anybody please help me to fix this problem?

Thanks,

Nadav