Part Number:MSP430FR5994
Hi all,
Im having trouble understanding the behaviour of the ADC12_B in the MSP430FR5994.
i have set up two channels MCTL0 and 1, and set EOS / enabled interupts on MCTL1. so i expected this interrupt to happen every second ADC trigger.
i have set timer B as the trigger, at 8Hz, and configured it to toggle a pin output as well.
i have also toggled another pin in the adc isr, this toggles at 2Hz, not 4Hz as expected.
i think i'm misunderstanding something. In autoscan - i've tried toggling, reset-then-set, and ignoring the ENC bit, doesn't seem to change anything.
i also tried repeat-autoscan. still get the same. going by the description i thought this mode would allow continuous reading of channels, 0 then 1 (with isr()), then 0 then 1.... without having to touch ENC.
---
I used Energytrace for 1sec, shown below. It shows adc is on for 0.25s, which is equal to 2 readings at 8hz. then off for 0.25s, then on... Seems to explain why rate is 2 times slower, but why is there this gap after sequence complete?
/*
* Main Function
*/
int main(void)
{
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer
Init_GPIO();
Init_Clock();
Init_Timer_TB0();
Init_ADC_Repeated_Autoscan();
while(1)
{
//SCOPE_BLUE_LOW;
__bis_SR_register(LPM3_bits | GIE); // Enter LPM3 w/interrupt
__no_operation(); // For debugger
}
}
//ADC SETUP
void Init_ADC_Repeated_Autoscan()
{
/* setup ADC pins */
P3SEL0 |= ADC_A15_PIN;
P3SEL1 |= ADC_A15_PIN;
/*
* MSC=0: Rising edge to trigger each S&C
* Sampling time, S&H=4, ADC12 on
*/
ADC12CTL0 = ADC12SHT0_0 | ADC12ON;
/* repeated autoscan
* Use TB0.0 to trigger
* SAPMCON sourced from sampling timer.
* ADC12SSELx:0 = MODOSC is clock source
*/
ADC12CTL1 = ADC12SHP | ADC12SHS_2 | ADC12CONSEQ_3;
/*
* ADC12CTL2 sets bitdepth, diff, lpmode
* ADC12CTL3 sets internal adc channels
* Leave defaults for now.
*/
/*
* A15 ADC input select.
* Vref+ = AVCC, Vref- = AVSS
* ADC12EOS: End of sequence
* @TODO - what happens if EOS isnt set in repeat autoscan? can keep going as long
* as you get memx results before being overwritten? (IFG could still trigger a read)
*/
ADC12MCTL0 = ADC12INCH_15; //Channel: ADC12INCH_15
ADC12MCTL1 = ADC12INCH_15 | ADC12EOS; //Channel: ADC12INCH_15
/*
* Interrupts
*/
ADC12IER0 |= ADC12IE1; // Enable ADC interrupt on IFG1
ADC12CTL0 |= ADC12ENC; // Enable conversion
}
...
//bit of ADC ISR()
case ADC12IV__ADC12IFG1: // Vector 14: ADC12MEM1
if (ADC12MEM1 >= APP_LIGHT_THRESHOLD) //x above ambient level.
{
P1OUT |= BIT0; // P1.0 = 1
}
else
{
P1OUT &= ~BIT0; // P1.0 = 0
}
// ADC12CTL0 &= ~ADC12ENC;
//ADC12CTL0 ^= ADC12ENC;
SCOPE_PURP_TOG;
//ADC12CTL0 |= ADC12ENC;
__bic_SR_register_on_exit(LPM3_bits);
break;