MSP432P401R SPI questions

I have a few SPI TI-RTOS driver/hardware related questions on MSP432P401R:

1. SPI_CS signal on boosterPack header J2

The schematics from MSP432P401R LaunchPad Development Kit documents shows that SPI_CS from J2 (P3.0_IO_J2.18) is connected to  P3.0/PM_UCA2STE, however other SPI signals on J2 are from UCB0(UCB0SIMO, UCB0SOMI)

It seems SPI_CS is not from the same SPI IP as other SPI signals. Is this correct?

2. Does SPI TI_RTOS driver supports SPI 4-wire option with CS? How to configure it?

3. Does SPI TI_RTOS driver provides timing configuration such as chipSelect-to-transmission delay or clock cycles between CS toggling?

Thanks,

Tao