Part Number:MSP430FR5969
Hi,
If you take a look at SLAS704F you will notice that in the Functional Block Diagram it mentions that there are 3 capture/compare modules attached to the ta0 instance of Timer A. But if you look at the Peripheral File Map in section 6.10.20 in the same document there are base addresses for five capture compare modules?
I am a little confused by this documentation, can someone clear it up?
Thanks