Part Number:MSP430FR5972
I understand that exiting LPM4.5 invokes the boot loader and then the reset vector. That RAM and registers are lost, including the stack pointer, which the reset handler should set up. But I don't understand when the ISR for an interrupt is invoked, if at all, when the interrupt wakes from LPM4.5. Usually an interrupt pushes the SP and PC onto the stack, and the RTI instruction return from interrupt pops them. Since the registers and RAM are lost, where would the PC and SP be pushed and popped? And normally (on other mcu's ?) the ISR clears an interrupt flag. Sorry if I am mixing concepts that don't apply to the MSP430FR.
Maybe just refer me to a document.
In my application, I just want an event on a GPIO port (from an Abracon RTC) to wake from LPM4.5.
For example, I am trying to understand the code in this thread: e2e.ti.com/.../623293