Part Number:MSP430FR2355
Tool/software: Code Composer Studio
My original code had clocking problems which i believe I now straightened out. During the clock configuration I managed to get binary sent to the CCS terminal but the clock frequency wasn't on target for the parameters I used to configure the EUSCI A1 (which is the UART used by ez-FET on the launchpad board (MSP430FR2355). Everything compiles and links. Clock frequency operation was verified by getMCLK() functions. I've gone over the parameters passed to the UART, verified the instance of the UART (A1) and checked the pin out against the schematics for the demo board. I am at a loss other than playing with UART parameter settings but that is a miss/hit approach. Any help is greatly appreciated here.
thank you
jim
#include <driverlib.h>
uint32_t myACLK = 0;
uint32_t mySMCLK = 0;
uint32_t myMCLK = 0;
//Functions
void initClocks (void){
CS_setExternalClockSource(32768); //CS_get?CLK need to know external clock source
myACLK=CS_getACLK();
myMCLK=CS_getMCLK();
mySMCLK=CS_getSMCLK();
//Register level statements using msp430fr2355.h in includes
// Configure one FRAM wait-state as required by the device data-sheet for MCLK operation beyond 8MHz
// must be done before configuring the clock system.
FRCTL0 = FRCTLPW | NWAITS_1; // for up to 8Mhz use FRCTLPW | NWAITS_0 , for Up to 16Mhz use NWAITS_1, for Up to 24Mhz use NWAITS_2
__bis_SR_register(SCG0); // disable FLL to enable writing the registers.
CSCTL3 |= SELREF__XT1CLK; // Set CTL1 as FLL reference source(32.768KHz)
CSCTL4 = SELMS__DCOCLKDIV | SELA__VLOCLK; // select DCOCLKDIV for MCLKand VLO for ACLK (10KHz)
CSCTL0 = 0x0000; // Set lowest possible DCOx, MODx ofer: MOD=0 DCO=0
CSCTL1 = DCOFTRIMEN_1 | DCOFTRIM0 | DCOFTRIM1 | DCORSEL_5;// DCOFTRIM=5, DCO Range = 16MHz
CSCTL2 = FLLD_0 + 487; // DCOCLKDIV = 16MHz ; For 8Mhz operation use: CSCTL2 = FLLD_1 + 244; set FLLD=1 result in /2 divider and FLLN=244
// Worst-case settling time for the DCO when the DCO range bits have been changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx
// UG for optimization. 32 x 32 x 8 MHz / 32,768 Hz = 250000 = MCLK cycles for DCO to settle.
CSCTL5 = DIVS_1; // Divide MCLK by 2 for SMCLK (8MHz)
__delay_cycles(250000); //Wait for FLL to stabilize
__bic_SR_register(SCG0);
myACLK=CS_getACLK(); //10KHZ
mySMCLK=CS_getSMCLK(); //8MHz
myMCLK=CS_getMCLK(); //16MHz
}
initTimers(void){
myACLK=CS_getACLK(); //10KHZ
Timer_B_initContinuousModeParam initB1 = {}; //initializer selects TB1
initB1.clockSource=TIMER_B_CLOCKSOURCE_ACLK;
initB1.clockSourceDivider=TIMER_B_CLOCKSOURCE_DIVIDER_1;
initB1.timerInterruptEnable_TBIE = TIMER_B_TBIE_INTERRUPT_ENABLE;
initB1.timerClear=TIMER_B_DO_CLEAR;
initB1.startTimer=false;
Timer_B_initContinuousMode(TIMER_B1_BASE,&initB1);
}
void Init_UART()
{
// Configure UART
EUSCI_A_UART_initParam param = {0};
param.selectClockSource = EUSCI_A_UART_CLOCKSOURCE_SMCLK;
param.clockPrescalar = 52;
param.firstModReg = 1;
param.secondModReg = 0x49;
param.parity = EUSCI_A_UART_NO_PARITY;
param.msborLsbFirst = EUSCI_A_UART_LSB_FIRST;
param.numberofStopBits = EUSCI_A_UART_ONE_STOP_BIT;
param.uartMode = EUSCI_A_UART_MODE;
param.overSampling = EUSCI_A_UART_OVERSAMPLING_BAUDRATE_GENERATION;
//EUSCI_A_UART_init(EUSCI_A1_BASE, ¶m);
if(STATUS_FAIL == EUSCI_A_UART_init(EUSCI_A1_BASE, ¶m))
return;
EUSCI_A_UART_enable(EUSCI_A1_BASE);
}
void initGPIO()
{
// Setup P1.6 LED
GPIO_setAsOutputPin(GPIO_PORT_P1,GPIO_PIN0);
GPIO_setAsOutputPin(GPIO_PORT_P6,GPIO_PIN6);
// Setup P2.3 and P1.1 as input buttons
GPIO_setAsInputPinWithPullUpResistor(GPIO_PORT_P2,GPIO_PIN3);
GPIO_setAsInputPinWithPullUpResistor(GPIO_PORT_P4,GPIO_PIN1);
//P2IES &= ~BIT3; //low to high transition
P2IFG = 0x00; //clear all interrupt flags
// enable pin interrupts
GPIO_enableInterrupt(GPIO_PORT_P2,GPIO_PIN3);
GPIO_enableInterrupt(GPIO_PORT_P4,GPIO_PIN1);
// Configure P4.3 - UCA1TXD and P4.2 - UCA1RXD
GPIO_setOutputLowOnPin(GPIO_PORT_P4, GPIO_PIN3);
GPIO_setAsOutputPin(GPIO_PORT_P4, GPIO_PIN3);
GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P4, GPIO_PIN2, GPIO_SECONDARY_MODULE_FUNCTION);
GPIO_setAsPeripheralModuleFunctionOutputPin(GPIO_PORT_P4, GPIO_PIN3, GPIO_SECONDARY_MODULE_FUNCTION);
}
int main(void) {
volatile uint32_t i;
volatile uint16_t j;
// Stop watchdog timer
WDT_A_hold(WDT_A_BASE);
initClocks();
initGPIO();
Init_UART();
//EUSCI_A_UART_enable(EUSCI_A1_BASE);
// Disable the GPIO power-on default high-impedance mode
// to activate previously configured port settings
PMM_unlockLPM5();
PM5CTL0 &= ~LOCKLPM5;
//turn off leds
GPIO_setOutputLowOnPin(GPIO_PORT_P1, GPIO_PIN0);
//start timer B1 and its interrupt
initTimers();
Timer_B_startCounter(TIMER_B1_BASE,TIMER_B_CONTINUOUS_MODE);
Timer_B_enableInterrupt(TIMER_B1_BASE);
__bis_SR_register(GIE);//enable interrupts
while(1)
{
volatile uint8_t i;
}
}
volatile uint32_t i;
volatile uint32_t j;
#pragma vector=TIMER1_B1_VECTOR
__interrupt void TOG_LED(void){
GPIO_toggleOutputOnPin(GPIO_PORT_P1,GPIO_PIN0);
Timer_B_clearTimerInterrupt(TIMER_B1_BASE);
}
#pragma vector=PORT2_VECTOR
// define interrupt vector
__interrupt void ISR_BUTTON_P23(void){
_delay_cycles(2000000); //wait for debounce
P1OUT &= ~BIT0;
P2IFG = 0x00; //clear Interrupt flag
P6OUT |= BIT6;
for (j=6; j>0; j--) //wait 6 cycles
{
for(i=200000; i>0; i--);
};
P6OUT &= ~BIT6;
}
#pragma vector=PORT4_VECTOR
// define interrupt vector
__interrupt void ISR_BUTTON_P41(void){
_delay_cycles(2000000); //wait for debounce
//GPIO_setAsPeripheralModuleFunctionOutputPin(GPIO_PORT_P4, GPIO_PIN3, GPIO_SECONDARY_MODULE_FUNCTION);
EUSCI_A_UART_transmitData(EUSCI_A1_BASE, 'H');
EUSCI_A_UART_transmitData(EUSCI_A1_BASE, 'E');
EUSCI_A_UART_transmitData(EUSCI_A1_BASE, 'L');
EUSCI_A_UART_transmitData(EUSCI_A1_BASE, 'L');
EUSCI_A_UART_transmitData(EUSCI_A1_BASE, 'O');
P1OUT &= ~BIT0;
P4IFG = 0x00;//clear Interrupt flag
P6OUT &= ~BIT6;
for (j=6; j>0; j--) //three flashes - cycle through code twice per flash
{
P6OUT ^= BIT6;
_delay_cycles(4000000);//replace with timer
EUSCI_A_UART_transmitData(EUSCI_A1_BASE, 'H');
}
P6OUT &= ~BIT6;
//EUSCI_A_UART_transmitData(EUSCI_A1_BASE, 'H');
}
