Part Number:MSP430F5524
Dear Forum
I am using SpyByWire on the MSP430F5524 and I have four problems/questions. I have ported the slau320 code zip file provided by TI to a Raspberry PI and am using two GPIO pins. Interrupts on the Raspberry PI are turned off during GPIO operations.
1. When I read the core Id and device Id I get the following two numbers 0x103 and 0x1a0.
These do not correspond to anything I can find in a data sheet. Where are these responses documented? Are they correct?
#define IR_COREIP_ID 0xE8 // original value: 0x17
#define IR_DEVICE_ID 0xE1 // original value: 0x87
cmd 0xe8 gives 0x103 //
cmd 0xe1 gives 0x1a0 // not 0x5540 which I should expect from the documentation?
2. I am uncertain of the layout of the the IR_CNTRL register for this device. There are four versions of the access code in the slau320w code reference that I downloaded. I need to be sure I am using the correct one.
The various versions write different numbers to the IR_CNTRL register and seem to refer to different versions of it. Does this register in the chip I am using follow the 5xx family layout described in Table 8-6 of MSP430 Memory Programming User's Guide. I have the feb 2010 revision? Perhaps this is out of date?
I think the 5xx designation is confusing since my device has four digits, namely 5524. Does 5xx encompass 5524 or not?
Is the device I am using an xv2 version? Where is it documented whether an MSP430 device is an xv2 version or not?
3. I note that when the 20 bit data register that is read by the slau320w code in some instances it rotates the top four bits to the bottom. This is called unscrambling in the code. But data sent to that register is not pre-srambled in that way. Why this is this not symmetric? Why should one ever read back from this register in 20-bit form since there are no 20-bit results documented anywhere as far as I can see?
4. Why can I only perform about 100 MemRead calls before the device looses synchronisation and a TAP-reset sequence is needed again? All of my signals and supply voltages are completely clean as far as I can see? Is the MPU perhaps coming out of sleep and interfering?
Many thanks
David Greaves


