CCS/MSP430FR5739: MCLK and SMCLK running at the wrong frequency

Part Number:MSP430FR5739

Tool/software: Code Composer Studio

I have setup my clocks to be MCLK = SMCLK = DCO @ 8MHz and ACLK = VLO @ 10kHz, as per the function below:

void clock_init(void)
{
    // Unlock CS registers.
    CSCTL0_H = 0xA5;
    /// @bug DCO should be 8MHz but is 1MHz for some reason.
    CSCTL1 &= ~(DCORSEL);
    CSCTL1 |= DCOFSEL0 | DCOFSEL1;
    // ACLK VLOCLK, SMCLK = MCLK = DCOCLK
    CSCTL2 |= SELA__VLOCLK | SELS__DCOCLK | SELM__DCOCLK;
    // No clock prescales.
    CSCTL3 |= DIVA__1 | DIVS__1 | DIVM__1;
    // Power down unused clocks.
    CSCTL4 |= XT1OFF | XT2OFF;
    // Lock the registers.
    CSCTL0_H = 0;
}

However for some reason, the MCLK and SMCLK both run at 1MHz and the ACLK is at ~8kHz.

I can't seem to understand what I'm doing wrong.